Memory and programmable logic

A memory is a huge array of stored bits, organised into words. A memory of 2ᵏ words of n bits has:

• k address lines: the number of the word to read or write;
• n data lines: the bits of that word;
• control lines: read or write, and chip enable.

Inside, a decoder turns the k address bits into one active word line, exactly as in the Multiplexers and decoders lesson.

words, bits = 64 * 1024, 8                 # a 64K x 8 memory
address_lines = (words - 1).bit_length()
print("address lines:", address_lines)
print("data lines:", bits)
print("size:", words * bits // 8 // 1024, "KB =", words * bits // 1024, "Kbit")

chip_words, chip_bits = 16 * 1024, 4       # built from 16K x 4 chips
side_by_side = bits // chip_bits
banks = words // chip_words
print("chips:", side_by_side, "side by side x", banks, "banks =", side_by_side * banks)

To build a bigger memory from small chips: put chips side by side for wider words (two 8-bit chips give 16-bit words), and add a decoder on the top address bits to pick one bank of chips for more words.

RAM: SRAM and DRAM

Both lose their contents without power (they are volatile). Flash memory (SSDs, phones) keeps data without power.

ROM: a stored truth table

A read-only memory stores fixed data. Any function of k inputs with n outputs is a ROM of 2ᵏ words of n bits: the inputs are the address and the stored word is the output. No simplification is needed; you just store the truth table.

# A ROM for "square of a 3-bit number": 8 words of 6 bits.
rom = [format(n * n, "06b") for n in range(8)]
for address in [3, 5, 7]:
    print("address", format(address, "03b"), "-> word", rom[address], "=", int(rom[address], 2))

Programmable logic

• A PLA (programmable logic array) has an AND plane and an OR plane whose connections are programmed: a sum of products in one chip.
• An FPGA holds thousands to millions of small lookup tables (tiny ROMs, usually 6 inputs), flip-flops, and programmable wiring between them. A hardware design (written in a language like Verilog or VHDL) is loaded at power-on, so the same chip can become a network switch, a video processor or a whole CPU.

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