Registers and counters

Intermediate

One flip-flop holds one bit. Put several side by side on the same clock and they hold a whole word.

Registers and shift registers

A register is n D flip-flops sharing a clock: at each edge it loads n bits at once. A processor's registers (the fastest memory it has) are exactly this.

A shift register chains the flip-flops: each one's input is the previous one's output, so at every clock edge all the bits move one place along, and a new bit enters at the end. Shift registers turn serial data (one bit at a time, as on a USB or network cable) into parallel data (a whole byte at once), and back.

register = [0, 0, 0, 0]
for bit in [1, 0, 1, 1]:
    register = [bit] + register[:-1]      # every bit moves one place right
    print("in", bit, "->", register)
Open in compiler

Counters

A counter goes through 000, 001, 010, … at each clock edge.

  • A ripple (asynchronous) counter chains T flip-flops with T = 1, each clocked by the previous one's output. It is simple, but the change ripples through one flip-flop after another, so the bits do not all change at the same moment.
  • A synchronous counter clocks every flip-flop together. Bit k must flip exactly when all the bits below it are 1, so T0 = 1, T1 = Q0, T2 = Q0Q1, and so on.

A mod-N counter counts 0 to N − 1 and then starts again: a mod-10 counter counts decimal digits, and a mod-60 counter counts the seconds of a clock. Detect the value N − 1, and make the next state 0 instead.

q = [0, 0, 0]                     # Q2 Q1 Q0
for clock in range(8):
    print("clock", clock, ":", q, "=", q[0] * 4 + q[1] * 2 + q[2])
    if q == [1, 0, 1]:            # mod-6: after 5, go back to 0
        q = [0, 0, 0]
        continue
    t0 = 1
    t1 = q[2]
    t2 = q[2] & q[1]
    q = [q[0] ^ t2, q[1] ^ t1, q[2] ^ t0]
Open in compiler

Counters also divide frequency: the lowest bit of a counter flips at half the clock rate, the next at a quarter. A digital watch counts a 32,768 Hz crystal down to one tick per second with a 15-bit counter (2¹⁵ = 32,768).

Common mistakes

  • Thinking a register needs one clock per bit: a parallel register loads all bits on one edge. Only a shift register moves one place per clock.
  • Using T = 1 for every flip-flop of a synchronous counter: each one must toggle only when all the lower bits are 1.
  • Letting a mod-N counter reach N before resetting: it should go from N − 1 straight to 0.

Quick check

1. In a synchronous binary counter, when does bit 2 toggle?
2. A 4-bit shift register holds 0000 and gets 1, 0, 1 in three clocks (shifting right). What does it hold?
3. How many flip-flops does a mod-10 counter need?
4. What is the main drawback of a ripple counter?
My notes

Write down what you want to remember from this lesson. Notes are saved on this device as you type, and appear on your dashboard.