Simulators
Flip-flop simulator
Choose a D, T, JK or SR flip-flop, type its inputs for each clock, and watch Q change only on the clock edge.
The simulator
Flip-flop simulator: how to use it
The timing diagram and the table show the next state and what the flip-flop did at each clock: hold, set, reset or toggle, and the SR input that is not allowed.
Lessons that use it
- Latches and flip-flops (Digital Logic)Circuits that remember: the SR latch, the D latch, and edge-triggered D, JK and T flip-flops, with their characteristic tables.
See also
- CPU scheduling simulator
- Page replacement simulator
- Banker's algorithm simulator
- Disk scheduling simulator
- Race condition simulator
- Truth table maker
- Gradient descent simulator
- K-means clustering simulator
- Subnet calculator
- Sliding window simulator
- TCP congestion control simulator
- Karnaugh map solver
- Ripple-carry adder
- Cache simulator
- 5-stage pipeline simulator