Simulators
Race condition simulator
Two threads each add 1 to a shared counter, one machine instruction (load, add, store) at a time, in the order you choose. Pick an order that loses an update and see the counter end at 1 instead of 2.
The simulator
Race condition simulator: how to use it
Turn the lock on and the second thread must wait until the first has finished its critical section, so no order can lose an update.
Lessons that use it
- Threads and race conditions (Operating Systems)Threads share a process's memory but each has its own stack. Why that makes count++ unsafe: a race condition you can cause yourself, step by step.
- Synchronization: locks and semaphores (Operating Systems)The critical-section problem and its three rules, Peterson's solution, hardware atomic instructions, mutex locks, semaphores, and the producer-consumer, readers-writers and dining-philosophers problems.
See also
- CPU scheduling simulator
- Page replacement simulator
- Banker's algorithm simulator
- Disk scheduling simulator
- Truth table maker
- Gradient descent simulator
- K-means clustering simulator
- Subnet calculator
- Sliding window simulator
- TCP congestion control simulator
- Karnaugh map solver
- Flip-flop simulator
- Ripple-carry adder
- Cache simulator
- 5-stage pipeline simulator